74HC76 - Dual JK Flip-Flop with Set and Clear ICThe74HC Series 74HC76 offers individual J, K, Clock Pulse, Direct Set, and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be acc
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The74HC Series 74HC76 offers individual J, K, Clock Pulse, Direct Set, and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted.
The Logic Level of the J and K inputs will perform according to the Truth Table as long as minimum set-up times are observed. Input data is transferred to the outputs on the HIGH-to-LOW clock transitions.
| PINNo | SYMBOL | NAME AND FUNCTION |
| 1, 6 | 1CK, 2CK | Clock Input(HIGH to LOW edge triggered) |
| 2, 7 | 1PR, 2PR | Set Inputs (Active LOW) |
| 3, 8 | 1CLR, 2CLR | Asynchronous Reset Inputs (Active LOW) |
| 4, 9 | 1J, 2J | Data Inputs: Flip-Flop 1 and 2 |
| 10, 14 | 1Q,2Q | Complement Flip-Flop Outputs |
| 11, 15 | 1Q,2Q | True Flip-Flop Outputs |
| 16, 12 | 1K,2K | Data Inputs: Flip-Flop 1 and 2 |
| 13 | GND | Ground (OV) |
| 5 | Vcc | Positive Supply Voltage |
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